To enable high performance of a computer such as a server or a supercomputer, the speed of a transmitting and receiving circuit for transmitting and receiving data between integrated circuits such as installed processors is increased. With the increase in the speed of the transmitting and receiving circuit, a variation in a characteristic of the transmitting and receiving circuit due to a manufacturing variation in the transmitting and receiving circuit, a change in a peripheral temperature, or a variation in a power supply voltage is noticeable. Thus, characteristic turning is executed.
A technique is known, which updates a resistance value of a receiving terminal portion installed at a terminal of a transmission path to an appropriate value within a terminal adjustment time period in response to the detection of an error of received data.
For example, as related art, Japanese Laid-open Patent Publication No. 2010-258841 and Japanese Laid-open Patent Publication No. 2004-15622 have been disclosed.
Since an effect of the manufacturing variation, an effect of the change in the peripheral temperature, or an effect of the variation in the power supply voltage appears in a transmission signal, the related-art characteristic turning is executed by only a receiving circuit. In the case where the turning is executed by only the receiving circuit, as a range of the manufacturing variation, a range of the change in the peripheral temperature, or a range of the variation in the power supply voltage is larger, the size of the receiving circuit is larger and it is more difficult to reduce power to be consumed.
Under such circumstances, it is desirable to reduce power to be consumed by a parameter setting transmission and reception system.